Many types of semiconductor and other types of memories store very small electrical charges that correspond to either a digital one or digital zero state. When a memory cell storing such a small charge is read, a small voltage of about 50-200 millivolts is developed on a bit line, which voltage must then be translated by a sense amplifier into a corresponding digital state. The sense amplifier must discriminate between either a small bit line voltage representative of a zero state or a somewhat larger bit line voltage representative of a one state and thereby produce an output digital state.
Sense amplifier design is a highly developed field for optimizing the translation of memory readout signals into corresponding digital signals in a highly reliable manner. Design considerations include speed, circuit area, noise immunity for discriminating between memory circuit noise and readout signals, as well as power considerations so that a memory that incorporates a large number of sense amplifiers does not consume substantial power. Circuit considerations as well as semiconductor fabricating techniques must be addressed so that the electrical characteristics of all the sense amplifiers in a memory are substantially identical and do not change due to various external parameters, including temperature.
One type of sense amplifier commonly used with dynamic random access memories and ferroelectric memories is the flip-flop type of latch that can discriminate between a reference voltage and a bit line voltage of either a zero or one level. In this configuration, a bit line is connected to one node of the sense amplifier flip-flop, while a reference voltage is connected to the other node. The flip-flop is of the type that can be switchably connected to a supply voltage so that after the readout signal appears on the bit line, the flip-flop is powered up, whereupon the flip-flop assumes a state based upon magnitude of the memory readout voltage. In other words, if the readout voltage is less than the reference, the flip-flop will assume one digital state, whereas if the readout voltage is greater than the reference voltage, the flip-flop will assume an opposite state.
Other types of sense amplifiers include either single-ended or double-ended differential input amplifier stages, followed by other differential stages and inverter outputs. While single stage differential amplifiers have high gain characteristics, and require relatively little semiconductor area, the electrical offset characteristics often vary between different sense amplifiers, due to process variations and layout symmetry. In addition, small area single-stage differential amplifiers have a characteristic lower bandwidth, poor drive capability, and limited signal swing. Two-stage differential amplifiers generally include two parallel arranged single-stage differential amplifiers, and a third single-stage differential amplifier receiving the outputs of the first stage amplifiers. In this latter configuration, a higher bandwidth can be achieved, and higher signal swing and drive capability is available without loss in accuracy. Offset sensitivities of the two-stage differential amplifier configuration are generally reduced, and speed as well as power consumption is compromised, with the attendant increase in the area of semiconductor material required.
From the foregoing, it can be seen that a need exists for an improved sense amplifier of the type that has a high signal sensitivity, lower power consumption, simplicity of operation, high speed, and includes relatively few components, thereby requiring little semiconductor area.